features ? built using the advantages and compatibility of cmos and ixys hdmos tm processes. ? latch-up protected ? high peak output current: 14a peak ? wide operating range: 4.5v to 25v ? ability to disable output under faults ? high capacitive load drive capability: 15nf in <30ns ? matched rise and fall times ? low propagation delay time ? low output impedance ? low supply current applications ? driving mosfets and igbts ? limiting di/dt under short circuit ? motor controls ? line drivers ? pulse generators ? local power on/off switch ? switch mode power supplies (smps) ? dc to dc converters ? pulse transformer driver ? class d switching amplifiers first release copyright ? ixys corporation 2001 patent pending general description the ixdd414 is a high speed high current gate driver specifically designed to drive the largest mosfets and igbts to their minimum switching time and maximum practical frequency limits. the ixdd414 can source and sink 14a of peak current while producing voltage rise and fall times of less than 30ns. the input of the driver is compatible with ttl or cmos and is fully immune to latch up over the entire operating range. designed with small internal delays, cross conduction/current shoot- through is virtually eliminated in the ixdd414. its features and wide safety margin in operating voltage and power make the ixdd414 unmatched in performance and value. the ixdd414 incorporates a unique ability to disable the output under fault conditions. when a logical low is forced into the enable input, both final output stage mosfets (nmos and pmos) are turned off. as a result, the output of the ixdd414 enters a tristate mode and achieves a soft turn-off of the mosfet/igbt when a short circuit is detected. this helps prevent damage that could occur to the mosfet/igbt if it were to be switched off abruptly due to a dv/dt over-voltage tran- sient. the ixdd414 is available in the standard 8-pin p-dip (pi), 5-pin to-220 (ci) and in the to-263 (yi) surface-mount package. 200 k ixdd414pi / 414yi / 414ci 14 amp low-side ultrafast mosfet driver figure 1 - functional diagram
2 ixdd414pi/414yi/414ci unless otherwise noted, t a = 25 o c, 4.5v v cc 25v . all voltage measurements with respect to gnd. ixdd414 configured as described in test conditions . electrical characteristics symbol parameter test conditions min typ max units v ih high input voltage 3.5 v v il low input voltage 0.8 v v in input voltage range -5 v cc + 0.3 v i in input current 0v v in v cc -10 10 a v oh high output voltage v cc - 0.025 v v ol low output voltage 0.025 v r oh output resistance @ output high i out = 10ma, v cc = 18v 600 1000 m ? r ol output resistance @ output low i out = 10ma, v cc = 18v 600 1000 m ? i peak peak output current v cc is 18v 14 a i dc continuous output current 8 pin dip (pi) (limited by pkg power dissipation) to220 (ci), to263 (yi) 3 4 a a v en enable voltage range - 0.3 vcc + 0.3 v v enh high en input voltage 2/3 vcc v v enl low en input voltage 1/3 vcc v t r rise time c l =15nf vcc=18v 23 25 29 ns t f fall time c l =15nf vcc=18v 21 22 26 ns t ondly on-time propagation delay c l =15nf vcc=18v 29 30 33 ns t offdly off-time propagation delay c l =15nf vcc=18v 29 31 34 ns t enoh enable to output high delay time vcc=18v 40 ns t dold disable to output low disable delay time vcc=18v 30 ns v cc power supply voltage 4.5 18 25 v i cc power supply current v in = 3.5v v in = 0v v in = + v cc 1 0 3 10 10 ma a a ren enable pull-up resistor 200 k ? absolute maximum ratings (note 1) parameter value supply voltage 25 v all other pins -0.3 v to v cc + 0.3 v power dissipation, t ambient 25 o c 8 pin pdip (pi) 975mw to220 (ci), to263 (yi) 12w derating factors (to ambient) 8 pin pdip (pi) 7.6mw/ o c to220 (ci), to263 (yi) 0.1w/ o c storage temperature -65 o c to 150 o c lead temperature (10 sec) 300 o c operating ratings parameter value maximum junction temperature 150 o c operating temperature range -40 o c to 85 o c thermal impedance (junction to case) to220 (ci), to263 (yi) ( jc ) 0.55 o c/w specifications subject to change without notice
3 ixdd414pi/414yi/414ci pin description symbol function description vcc supply voltage positive power-supply voltage input. this pin provides power to the entire chip. the range for this voltage is from 4.5v to 25v. in input input signal-ttl or cmos compatible. en enable the system enable pin. this pin, when driven low, disables the chip, forcing high impedance state to the output. out output driver output. for application purposes, this pin is connected, through a resistor, to gate of a mosfet/igbt. gnd ground the system ground pin. internally connected to all circuitry, this pin provides ground reference for the entire chip. this pin should be connected to a low noise analog ground plane for optimum performance. note 1: operating the device beyond parameters with listed ?absolute maximum ratings? may cause permanent damage to the device. typical values indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. the guaranteed specifications apply only for the test conditions listed. exposure to absolute maximum rated conditions for extended periods may affect device reliability. caution: these devices are sensitive to electrostatic discharge; follow proper esd procedures when handling and assembling this component. v in vcc in en gnd vcc out gnd out 1 2 3 4 8 7 6 5 i x d d 4 1 4 8 pin dip (pi) to220 (ci) to263 (yi) IXDD414YI ixdd414c i vcc out gnd in en 1 2 3 4 5 pin configurations figure 2 - characteristics test diagram
4 ixdd414pi/414yi/414ci max / min input vs. junction temperature v cc =18v c l =15nf temperature ( o c) -60 -40 -20 0 20 40 60 80 100 max / mi n input (v) 1.6 1.8 2.2 2.4 2.6 2.8 3.2 2.0 3.0 maxi mum i nput low mi ni mum i nput hi gh fall time vs. load capacitance load capacitance (pf) 0k 5k 10k 15k 20k fall time (ns) 0 10 20 30 40 18v 8v 10v 12v 14v 16v rise time vs. load capacitance load capacitance (pf) 0k 5k 10k 15k 20k rise time (ns) 0 10 20 30 40 50 18v 8v 10v 12v 14v 16v rise and fall times vs. junction temperature c l = 15 nf, v cc = 18v tem p erature ( c ) -40 -20 0 20 40 60 80 100 120 time (ns) 0 5 10 15 20 25 30 35 40 t f t r rise time vs. supply voltage supply voltage (v) 8 1012141618 ri se ti me (ns) 0 10 20 30 40 cl=15,000 pf 7,500 pf 3,600 pf fall time vs. supply voltage supply voltage (v) 8 1012141618 fall time (ns) 0 10 20 30 40 cl=15,000 pf 7,500 pf 3,600 pf typical performance characteristics fig. 3 fig. 4 fig. 5 fig. 6 fig. 7 fig. 8
5 ixdd414pi/414yi/414ci supply current vs. load capacitance vcc=8v load capacitance (pf) 1k 10k 100k suppl y current (ma) 1 10 100 1000 50 khz 100 khz 500 khz 1 mhz 2 mhz supply current vs. load capacitance vcc=12v load capacitance (pf) 1k 10k 100k suppl y current (ma) 1 10 100 1000 50 khz 100 khz 500 khz 1 mhz 2 mhz supply current vs. frequency vcc=8v frequency (khz) 10 100 1000 10000 supply current (ma) 0.1 1 10 100 1000 2000 pf cl= 30 nf 5000 pf 15 nf supply current vs. frequency vcc=18v frequency (khz) 10 100 1000 10000 suppl y current (ma) 0.1 1 10 100 1000 2000 pf cl= 30 nf 5000 pf 15 nf supply current vs. frequency vcc=12v frequency (khz) 10 100 1000 10000 supply current (ma) 0.1 1 10 100 1000 2000 pf cl = 30 nf 5000 pf 15 nf supply current vs. load capacitance vcc=18v load capacitance (pf) 1k 10k 100k supply current (ma) 1 10 100 1000 50 khz 100 khz 500 khz 1 mhz 2 mhz fig. 11 fig. 13 fig. 9 fig. 10 fig. 12 fig. 14
6 ixdd414pi/414yi/414ci propagation delay vs. input voltage c l =15nf v cc =15v input voltage (v) 2 4 6 8 10 12 propagation delay (ns) 0 10 20 30 40 50 t ondly t offdly propagation delay vs. s upply voltage c l =15nf v in =5v@1khz supply voltage (v) 8 1012141618 propagation delay (ns) 0 10 20 30 40 50 t ondly t offdly p channel peak output current vs. case temperature ci and yi packages, v cc =18v c l =.1uf temperature ( o c) -40-200 20406080100 p channel output current (a) 12 13 14 15 16 n channel peak output current vs. case temperature ci and yi packages, v cc =18v c l =.1uf temperature ( o c) -40-200 20406080100 n channel output current (a) 14 15 16 17 quiescent supply current vs. junction temperature v cc =18v v in =5v@1khz tem p erature ( o c ) -40-200 20406080 quiescent supply current (ma) 0.50 0.52 0.54 0.56 0.58 0.60 propagation delay times vs. junction temperature c l = 2500pf, v cc = 18v tem p erature ( c ) -40-200 20406080100120 time (ns) 10 15 20 25 30 35 40 45 50 t offdly t ondly fig. 16 fig. 18 fig. 20 fig. 15 fig. 17 fig. 19
7 ixdd414pi/414yi/414ci low-state output resistance vs. supply voltage supply voltage (v) 10 15 20 25 low-state output resistance (ohms) 0.2 0.4 0.6 0.8 0.0 1.0 8 high state output resistance vs. supply voltage supply voltage (v) 10 15 20 25 high state output resistance (ohm) 0.2 0.4 0.6 0.8 0.0 1.0 8 v cc vs. p channel output current c l =.1uf v in =0-5v@1khz vcc 10 15 20 25 p channel output current (a) -24 -22 -20 -18 -16 -14 -12 -10 -8 -6 -4 -2 0 8 vcc vs. n channel output current c l =.1uf v in =0-5v@1khz vcc 10 15 20 25 n channel output current (a) 0 2 4 6 8 10 12 14 16 18 20 22 24 8 enable threshold vs. supply voltage supply voltage (v) 8 101214161820222426 enable threshold (v) 0 2 4 6 8 10 12 14 fig. 21 fig. 22 fig. 23 fig. 24 fig. 25 figure 26 - typical application short circuit di/dt limit
8 ixdd414pi/414yi/414ci short circuit di/dt limit applications information a short circuit in a high-power mosfet module such as the vm0580-02f, (580a, 200v), as shown in figure 26, can cause the current through the module to flow in excess of 1500a for 10 s or more prior to self-destruction due to thermal runaway. for this reason, some protection circuitry is needed to turn off the mosfet module. however, if the module is switched off too fast, there is a danger of voltage transients occuring on the drain due to ldi/dt, (where l represents total inductance in series with drain). if these voltage transients exceed the mosfet's voltage rating, this can cause an avalanche break- down. the ixdd414 has the unique capability to softly switch off the high-power mosfet module, significantly reducing these ldi/dt transients. thus, the ixdd414 helps to prevent device destruction from both dangers; over-current, and avalanche breakdown due to di/dt induced over-voltage transients. the ixdd414 is designed to not only provide 14a under normal conditions, but also to allow it's output to go into a high impedance state. this permits the ixdd414 output to control a separate weak pull-down circuit during detected overcurrent shutdown conditions to limit and separately control d vgs /dt gate turnoff. this circuit is shown in figure 27. referring to figure 27, the protection circuitry should include a comparator, whose positive input is connected to the source of the vm0580-02. a low pass filter should be added to the input of the comparator to eliminate any glitches in voltage caused by the inductance of the wire connecting the source resistor to ground. (those glitches might cause false triggering of the comparator). the comparator's output should be connected to a srff( set reset flip flop). the flip-flop controls both the enable signal, and the low power mosfet gate. please note that cmos 4000- series devices operate with a v cc range from 3 to 15 vdc, (with 18 vdc being the maximum allowable limit). a low power mosfet, such as the 2n7000, in series with a resistor, will enable the vmo580-02f gate voltage to drop gradually. the resistor should be chosen so that the rc time constant will be 100us, where "c" is the miller capacitance of the vmo580-02f. for resuming normal operation, a reset signal is needed at the srff's input to enable the ixdd414 again. this reset can be generated by connecting a one shot circuit between the ixdd414 input signal and the srff restart input. the one shot will create a pulse on the rise of the ixdd414 input, and this pulse will reset the srff outputs to normal operation. when a short circuit occurs, the voltage drop across the low- value, current-sensing resistor, (rs=0.005 ohm), connected between the mosfet source and ground, increases. this triggers the comparator at a preset level. the srff drives a low input into the enable pin disabling the ixdd408 output. the srff also turns on the low power mosfet, (2n7000). in this way, the high-power mosfet module is softly turned off by the ixdd414, preventing its destruction. 10uh ld 0.1ohm rd rs 20nh ls 1ohm rg 10kohm r+ vmo580-02f high_power 5kohm rcomp 100pf c+ + - v+ v- comp lm339 1600ohm rsh ccomp 1pf vcc vcca in en gnd sub out ixdd414 + - vin + - vcc + - ref + - vb cd4001a nor2 1mohm ros not2 cd4049a cd4011a nand cd4049a not1 cd4001a nor1 cd4049a not3 low_power 2n7002/plp 1pf cos 0 s r en q one shot circuit sr flip-flop figure 27 - application test diagram
9 ixdd414pi/414yi/414ci when designing a circuit to drive a high speed mosfet utilizing the ixdd414, it is very important to keep certain design criteria in mind, in order to optimize performance of the driver. particular attention needs to be paid to supply bypassing , grounding , and minimizing the output lead inductance . say, for example, we are using the ixdd414 to charge a 5000pf capacitive load from 0 to 25 volts in 25ns. using the formula: i= ? v c / ? t, where ? v=25v c=5000pf & ? t=25ns we can determine that to charge 5000pf to 25 volts in 25ns will take a constant current of 5a. (in reality, the charging current won?t be constant, and will peak somewhere around 8a). supply bypassing in order for our design to turn the load on properly, the ixdd414 must be able to draw this 5a of current from the power supply in the 25ns. this means that there must be very low impedance between the driver and the power supply. the most common method of achieving this low impedance is to bypass the power supply at the driver with a capacitance value that is a magnitude larger than the load capacitance. usually, this would be achieved by placing two different types of bypassing capacitors, with complementary impedance curves, very close to the driver itself. (these capacitors should be carefully selected, low inductance, low resistance, high-pulse current- service capacitors). lead lengths may radiate at high frequency due to inductance, so care should be taken to keep the lengths of the leads between these bypass capacitors and the ixdd414 to an absolute minimum. grounding in order for the design to turn the load off properly, the ixdd414 must be able to drain this 5a of current into an adequate grounding system. there are three paths for returning current that need to be considered: path #1 is between the ixdd414 and it?s load. path #2 is between the ixdd414 and it?s power supply. path #3 is between the ixdd414 and whatever logic is driving it. all three of these paths should be as low in resistance and inductance as possible, and thus as short as practical. in addition, every effort should be made to keep these three ground paths distinctly separate. otherwise, (for instance), the returning ground current from the load may develop a voltage that would have a detrimental effect on the logic line driving the ixdd414. output lead inductance of equal importance to supply bypassing and grounding are issues related to the output lead inductance. every effort should be made to keep the leads between the driver and it?s load as short and wide as possible. if the driver must be placed farther than 2? from the load, then the output leads should be treated as transmission lines. in this case, a twisted-pair should be considered, and the return line of each twisted pair should be placed as close as possible to the ground pin of the driver, and connect directly to the ground terminal of the load. supply bypassing and grounding practices, output lead inductance 10k r3 3.3k r2 q1 2n3904 en output cc (from gate driver power supply) input) ttl cmos 3.3k r1 v dd (from logic power supply) or high voltage (to ixdd414 en input) the enable (en) input to the ixdd414 is a high voltage cmos logic level input where the en input threshold is ? v cc , and may not be compatible with 5v cmos or ttl input levels. the ixdd414 en input was intentionally designed for enhanced noise immunity with the high voltage cmos logic levels. in a typical gate driver application, v cc =15v and the en input threshold at 7.5v, a 5v cmos logical high input applied to this typical ixdd414 application?s en input will be misinterpreted as a logical low, and may cause undesirable or unexpected results. the note below is for optional adaptation of ttl or 5v cmos levels. the circuit in figure 28 alleviates this potential logic level misinterpretation by translating a ttl or 5v cmos logic input to high voltage cmos logic levels needed by the ixdd414 en input. from the figure, v cc is the gate driver power supply, typically set between 8v to 20v, and v dd is the logic power supply, typically between 3.3v to 5.5v. resistors r1 and r2 form a voltage divider network so that the q1 base is positioned at the midpoint of the expected ttl logic transition levels. a ttl or 5v cmos logic low, v ttllow =~<0.8v, input applied to the q1 emitter will drive it on. this causes the level translator output, the q1 collector output to settle to v cesatq1 + v ttllow =<~2v, which is sufficiently low to be correctly interpreted as a high voltage cmos logic low (<1/3v cc =5v for v cc =15v given in the ixdd414 data sheet.) a ttl high, v ttlhigh =>~2.4v, or a 5v cmos high, v 5vcmoshigh =~>3.5v, applied to the en input of the circuit in figure 28 will cause q1 to be biased off. this results in q1 collector being pulled up by r3 to v cc =15v, and provides a high voltage cmos logic high output. the high voltage cmos logical en output applied to the ixdd414 en input will enable it, allowing the gate driver to fully function as an 8 amp output driver. the total component cost of the circuit in figure 28 is less than $0.10 if purchased in quantities >1k pieces. it is recommended that the physical placement of the level translator circuit be placed close to the source of the ttl or cmos logic circuits to maximize noise rejection. figure 28 - ttl to high voltage cmos level translator ttl to high voltage cmos level translation
10 ixdd414pi/414yi/414ci ixys semiconductor gmbh edisonstrasse15 ; d-68623; lampertheim tel: +49-6206-503-0; fax: +49-6206-503627 e-mail: marcom@ixys.de ixys corporation 3540 bassett st; santa clara, ca 95054 tel: 408-982-0700; fax: 408-496-0670 e-mail: sales@ixys.net part number package type temp. range grade ixdd414pi 8-pin pdip -40 c to +85 c industrial IXDD414YI 5-pin to-263 -40 c to +85 c industrial ixdd414ci 5-pin to-220 -40 c to +85 c industrial ordering information directed energy, inc. an ixys company 2401 research blvd. ste. 108, ft. collins, co 80526 tel: 970-493-1901; fax: 970-493-1903 e-mail: deiinfo@directedenergy.com doc #9200-0228 r6 note: mounting or solder tabs on all packages are connected to ground
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